DDR3 Unbuffered DIMM

Features

• VDDQ = 1.5V (+/-) 0.075V
  
• 8 independent internal bank
  
• Programmable /CAS Latency : (4), 5, 6, 7, 8, 9, 10, (11 for high density only)
  
• Programmable /CAS Write Latency (CWL) = 5 (DDR3-800), 6 (DDR3-1066), 7 (DDR3-1333), 8 (DDR3-1600)
  
• 8-bit pre-fetch
  
• Bi-directional Differential Data-Strobe
  
• Internal(self) calibration
  
• On Die Termination using ODT pin
  
• Average Refresh Period 7.8us at lower than TCASE 85°C, 3.9us at 85°C < TCASE > 95°C
  
• All of Lead-free products are compliant for RoHS